1. Field of the Invention
The present invention relates to an apparatus and method for performance monitoring and more specifically the performance monitoring and optimization of controller parameters.
2. Description of the Related Art
Many microprocessors used in desktop computer systems, are equipped with performance monitoring counters. These counters permit processor performance parameters to be monitored and measured. Such information is useful for performance tuning. Current techniques typically utilize two counters that simultaneously record the occurrence of pre-specified events. When one of the counters overflows, counting stops, an interrupt is generated. Post-processing software is used to analyze the gathered data.
Typically two large counters, of e.g., 40-bits or more, are provided for event counting. The counters can generally be read and written from within register address space. The counters can be configured to measure such parameters as the number of data reads that hit in the cache. When configured to determine cache hits, the first counter is programmed to record the number of cache hits and the second counter is programmed to record the number of actual data reads performed. The ratio of the two numbers gives the cache-hit rate for read operations. Measured performance parameters are a good estimate of future performance. Actual performance at any instant may vary widely from the measured estimate. The typical use of two large counters does not measure this deviation from the average.
When one of the counters reaches its limit, the overflow signal stops all counting and generates an interrupt. The software interrupt handler then records the counter values, completes post data processing and any other support work necessary.
It would be desirable to have a system and method for monitoring performance that does not require an interrupt for monitoring performance, and also provides a method of obtaining feedback for optimizing components of an integrated circuit such as a processor or a controller.
Accordingly, the invention provides a new technique for monitoring and optimizing components in accordance with a statistical analysis of component parameters. More specifically, a system, method and an integrated circuit monitors parameter performance for optimization of components. The integrated circuit includes a memory controller, one or more buffers coupled to the memory controller, and a performance monitoring circuit coupled to the one or more buffers and the memory controller, the performance monitoring circuit to receive at least one parameter related to the buffers and provide statistical data related to the parameter. The statistical data is used to set an amount of data to accumulate in the one or more buffers, or configure various parameters in the memory controller.
According to a further embodiment, a method includes transmitting one or more parameters related to performance of one more components of an integrated circuit to a performance monitoring circuit located within the integrated circuit. The performance monitoring circuit then determines statistical data related to the parameter independent of an interrupt to the integrated circuit. Further, the method includes transmitting the statistical data to a register in the integrated circuit and interpreting the statistical data according to predetermined parameters to improve functionality of the component. The interpreting is accomplished through software that sets a configuration. The method further includes either altering functionality or maintaining functionality of the component of the integrated circuit according to the interpretation of the statistical data.